[Stackless] stackless on the arm processor (and asm problems)

[Richard]

Hi,
 
Has anyone successfully gotten stackless to run on the arm processor?
 
I am having trouble getting my slp_switch function to work.  The problem is that gcc preserves the stack register, so while the stack memory may be saved and restored correctly, the register itself can't be adjusted to match the memory changes.
 
Here is my function:
 
static int
slp_switch(void)
{
 register int *stackref, stsizediff;
 __asm__ volatile ("" : : : REGS_TO_SAVE);
 __asm__ ("mov %0, sp" : "=g" (stackref) : );
 {
  SLP_SAVE_STATE(sp, stsizediff);
  __asm__ volatile (
      "mov r0, %0\n"
      "add sp, sp, r0\n"
      :
      : "g" (stsizediff)
      : "r0"
      );
  SLP_RESTORE_STATE();
  return 0;
 }
 __asm__ volatile ("" : : : REGS_TO_SAVE);
}

sp seems to be consistently stored in r7 for the length of the call to this function.  If I modify the sp changes to change r7 instead, it can do so without gcc preserving that register as well.  But that seems like a hack.
 
Any ideas?
 
Thanks,
Richard.

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