[Stackless] Stackless Python for Python 2.5.1

[Kristján Valur Jónsson]

The  comments from the switch_x64_masm.masm really only are valid on windows.

To know what to do on linux, we need to know the x64 ABI that linux employs, which is bound to be different from what win64 uses.



I found this document:

http://www.x86-64.org/documentation/abi.pdf



And on page 14, it says this:



3.2.1 Registers and the Stack Frame

The AMD64 architecture provides 16 general purpose 64-bit registers. In addition

the architecture provides 16 SSE registers, each 128 bits wide and 8 x87 floating

point registers, each 80 bits wide. Each of the x87 floating point registers may be

referred to in MMX/3DNow! mode as a 64-bit register. All of these registers are

global to all procedures active for a given thread.

This subsection discusses usage of each register. Registers %rbp, %rbx and

%r12 through %r15 "belong" to the calling function and the called function is

required to preserve their values. In other words, a called function must preserve

these registers' values for its caller. Remaining registers "belong" to the called

function.5 If a calling function wants to preserve such a register value across a

function call, it must save the value in its local stack frame.

The CPU shall be in x87 mode upon entry to a function. Therefore, every

function that uses the MMX registers is required to issue an emms or femms

instruction after using MMX registers, before returning or calling another function.

6 The direction flag DF in the %rFLAGS register must be clear (set to "forward"

direction) on function entry and return. Other user flags have no specified role in

the standard calling sequence and are not preserved across calls.

The control bits of the MXCSR register are callee-saved (preserved across

calls), while the status bits are caller-saved (not preserved). The x87 status word

register is caller-saved, whereas the x87 control word is callee-saved.



>From this it seems that we must save rbp, rbx and r12-r15, plus the mxcsr register.



K





> -----Original Message-----

> From: stackless-bounces at stackless.com [mailto:stackless-

> bounces at stackless.com] On Behalf Of Richard Tew

> Sent: Wednesday, May 09, 2007 07:04

> To: Alec Flett

> Cc: Stackless mailing list

> Subject: Re: [Stackless] Stackless Python for Python 2.5.1

>

> On 5/8/07, Alec Flett <alecf at flett.org> wrote:

> > So what is the state of the amd64 support? I saw a lot of stuff

> exchanged a

> > few weeks back with Hieu but I wasn't really sure of the conclusion.

>

> Exactly what I said in the email you quoted:

>

> "The only remaining known issue is that the amd64 linux platform is not

> supported at this time.  This involves a large amount of effort which

> I have not as yet had time for."

>

> Shouldn't people on AMD64 platforms be able to compile for x86 still

> and use Stackless that way in the meantime?

>

> Richard.

>

> _______________________________________________

> Stackless mailing list

> Stackless at stackless.com

> http://www.stackless.com/mailman/listinfo/stackless
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://www.stackless.com/pipermail/stackless/attachments/20070509/6c2a1801/attachment.htm>
-------------- next part --------------
_______________________________________________
Stackless mailing list
Stackless at stackless.com
http://www.stackless.com/mailman/listinfo/stackless